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Espressif Systems /ESP32-S2 /SPI0 /SLV_RD_BYTE

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Interpret as SLV_RD_BYTE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SLV_DATA_BYTELEN0 (SLV_RDDMA_BYTELEN_EN)SLV_RDDMA_BYTELEN_EN 0 (SLV_WRDMA_BYTELEN_EN)SLV_WRDMA_BYTELEN_EN 0 (SLV_RDBUF_BYTELEN_EN)SLV_RDBUF_BYTELEN_EN 0 (SLV_WRBUF_BYTELEN_EN)SLV_WRBUF_BYTELEN_EN 0DMA_SEG_MAGIC_VALUE 0 (SLV_RD_DMA_DONE)SLV_RD_DMA_DONE 0 (USR_CONF)USR_CONF

Description

SPI interrupt control register

Fields

SLV_DATA_BYTELEN

The full-duplex or half-duplex data byte length of the last SPI transfer in slave mode. In half-duplex mode, this value is controlled by bits [23:20].
SLV_RDDMA_BYTELEN_EN

1: SPI_SLV_DATA_BYTELEN stores data byte length of master-read-slave data length in DMA controlled mode(Rd_DMA). 0: others
SLV_WRDMA_BYTELEN_EN

1: SPI_SLV_DATA_BYTELEN stores data byte length of master-write-to-slave data length in DMA controlled mode(Wr_DMA). 0: others
SLV_RDBUF_BYTELEN_EN

1: SPI_SLV_DATA_BYTELEN stores data byte length of master-read-slave data length in CPU controlled mode(Rd_BUF). 0: others
SLV_WRBUF_BYTELEN_EN

1: SPI_SLV_DATA_BYTELEN stores data byte length of master-write-to-slave data length in CPU controlled mode(Wr_BUF). 0: others
DMA_SEG_MAGIC_VALUE

The magic value of BM table in master DMA seg-trans.
SLV_RD_DMA_DONE

The interrupt raw bit for the completion of Rd-DMA operation in the slave mode. Can not be changed by CONF_buf.
USR_CONF

1: Enable the DMA CONF phase of current seg-trans operation, which means seg-trans will start. 0: This is not seg-trans mode.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data